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www.kersemi.com 1 12/03/04 IRFR3418PBF irfu3418pbf hexfet power mosfet d-pak irfr3418 i-pak irfu3418 high frequency dc-dc converters lead-free benefits applications low gate-to-drain charge to reduce switching losses fully characterized capacitance including effective c oss to simplify design, (see app. note an1001) fully characterized avalanche voltage and current absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v i d @ t c = 100c continuous drain current, v gs @ 10v a i dm pulsed drain current p d @t c = 25c maximum power dissipation w p d @t a = 25c maximum power dissipation linear derating factor w/c dv/dt peak diode recovery dv/dt v/ns t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds thermal resistance parameter typ. max. units r jc junction-to-case ??? 1.05 r ja junction-to-ambient (pcb mount) * ??? 40 c/w r ja junction-to-ambient ??? 110 300 (1.6mm from case ) max. 70 50 280 80 20 140 0.95 5.2 3.8 -55 to + 175 v dss r ds(on) max i d 80v 14m 30a
2 www.kersemi.com s d g static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 80 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.08 ??? v/c r ds(on) static drain-to-source on-resistance ??? 11.5 14 m ? v gs(th) gate threshold voltage 3.5 ??? 5.5 v i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 dynamic @ t j = 25c (unless otherwise specified) parameter min. typ. max. units gfs forward transconductance 66 ??? ??? s q g total gate charge ??? 63 94 q gs gate-to-source charge ??? 23 ??? nc q gd gate-to-drain ("miller") charge ??? 23 ??? t d(on) turn-on delay time ??? 24 ??? t r rise time ??? 72 ??? t d(off) turn-off delay time ??? 41 ??? ns t f fall time ??? 27 ??? c iss input capacitance ??? 3510 ??? c oss output capacitance ??? 330 ??? c rss reverse transfer capacitance ??? 190 ??? pf c oss output capacitance ??? 1220 ??? c oss output capacitance ??? 240 ??? c oss eff. effective output capacitance ??? 360 ??? avalanche characteristics parameter units e as single pulse avalanche energy mj i ar avalanche current a diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 70 a (body diode) i sm pulsed source current ??? ??? 280 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 57 ??? ns q rr reverse recovery charge ??? 130 ??? nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) typ. ??? ??? conditions v ds = 25v, i d = 18a i d = 18a v ds = 40v conditions v gs = 10v v gs = 0v v ds = 25v ? = 1.0mhz 260 18 mosfet symbol showing the integral reverse p-n junction diode. t j = 25c, i s = 18a, v gs = 0v t j = 150c, i f = 18a, v dd = 25v di/dt = 100a/s conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 18a v ds = v gs , i d = 250a v ds = 80v, v gs = 0v v ds = 64v, v gs = 0v, t j = 150c v gs = 20v v gs = -20v max. v gs = 0v, v ds = 1.0v, ? = 1.0mh z v gs = 0v, v ds = 64v, ? = 1.0mh z v gs = 0v, v ds = 0v to 64v v gs = 10v v dd = 40v i d = 18a r g = 6.8 ? www.kersemi.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) v = i = gs d 10v 70a t j , junction temperature (c) ds(on) 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.001 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 6.0v 20s pulse width tj = 25c vgs top 15v 10v 9.0v 8.0v 7.5v 7.0v 6.5v bottom 6.0v 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 6.0v 20s pulse width tj = 175c vgs top 15v 10v 9.0v 8.0v 7.5v 7.0v 6.5v bottom 6.0v 5 6 7 8 9 10 11 12 13 14 15 v gs , gate-to-source voltage (v) 0.01 0.10 1.00 10.00 100.00 1000.00 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 20s pulse width 4 www.kersemi.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0.0 0.5 1.0 1.5 2.0 v sd , source-todrain voltage (v) 0.10 1.00 10.00 100.00 1000.00 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 1msec 10msec operation in this area limited by r ds (on) 100sec t c = 25c tj = 175c single pulse 0 10203040506070 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 64v v ds = 40v v ds = 16v i d = 18a www.kersemi.com 5 fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms 1 0.1 % + - fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 20 40 60 80 t , case temperature ( c) i , drain current (a) c d limited by package 6 www.kersemi.com q g q gs q gd v g charge d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 12c. maximum avalanche energy vs. drain current r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 0 1 00 2 00 3 00 4 00 5 00 6 00 starting t , junction temperature( c) i d top bottom 7.3a 13a 18a starting t j , junction temperature (c) as !"# www.kersemi.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet power mosfets $%&''!! ? !( )" ? ! "* ? + )" ", -- ? ! . '" . ? '/ "+ ? 0 ? '/'1+ . & 8 www.kersemi.com 12 in the assembly line "a" as sembled on ww 16, 1999 example: wi t h as s e mb l y t his is an ir f r 120 lot code 1234 year 9 = 199 9 dat e code week 16 part number logo int ernational rect ifier assembly lot code 916a irf u120 34 year 9 = 1999 dat e code or p = designates lead-f ree product (opt ional) note: "p" in as sembly line position indicates "l ead-f r ee" 12 34 week 16 a = assembly site code part number irf u120 line a logo lot code assembly int ernational rect ifier www.kersemi.com 9 as s e mb l y example: wit h as s e mb l y this is an irfu120 year 9 = 199 9 dat e code line a we e k 19 in t he as s e mb ly l ine "a" as s e mb le d on ww 19, 1999 lot code 5678 part number 56 irfu120 international logo rectifier lot code 919a 78 note: "p" in as s embly line pos i ti on i ndi cates "l ead- f r ee" 56 78 as s e mb l y lot code rectifier logo international irf u120 part numb er week 19 dat e code ye ar 9 = 1999 a = as s e mb l y s i t e code p = designates lead-free product (opt ional) 10 www.kersemi.com repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 1.6mh r g = 25 ? , i as = 18a. i sd 18a, di/dt 350a/s, v dd v (br)dss , t j 175c. pulse width 300s; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss calculated continuous current based on maximum allowable junction temperature. package limitation current is 30a. tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl n otes : 1 . controlling dimension : millimeter. 2 . all dimensions are shown in millimeters ( inches ). 3 . outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch |
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